1. Field of the Invention
This invention relates to digital-to-analog converters. More particularly, this invention relates to such converters of the type formed with a plurality of current source transistors arranged to carry different levels of current according to a predetermined weighting pattern, such as a binary weighting pattern. This invention relates also to apparatuses for generating a temperature-varying current.
2. Description of the Prior Art
Digital-to-analog converters generally have comprised a plurality of transistors arranged to carry different levels of current according to a predetermined weighting pattern, with switches selectively operated by an input digital signal to combine selected currents into an analog output signal. Examples of such designs are shown in U.S. Pat. Nos. 3,685,045 and 3,747,088. In such digital-to-analog converters, the transistor current sources are connected to a current-weighting network of resistors which determines the current each transistor is to carry. These converters also use a control loop to establish the proper base voltage for a reference current transistor, and all the current source transistors are driven from this same base voltage.
In such converters it is desired to establish equal voltages at the emitters of the current source transistors, since each of the emitters then can force the appropriate weight of current in its associated resistor or in the current-weighting resistive network. If the emitter voltages are unequal, the currents associated with each bit will not be in the proper ratio. Moreover, temperature drifts in these emitter voltage differences produce temperature-dependent errors in the output. While the resistors could be trimmed to eliminate initial errors, any temperature drift cannot be so corrected.
One technique for establishing equal emitter voltages, as shown in U.S. Pat. No. 3,747,088, is to proportion the emitter areas so that all of the current source transistors operate at the same current density and thus have the same base-to-emitter voltages and temperature characteristics. Since all the current source transistors are driven with a common base voltage, the emitter voltages also will be equal, even with changes in temperature. Since the currents in such converters are ordinarily scaled with a binary weighting pattern, this means that the emitter areas must also have a binary weighting. Even taking advantage of the significant step of dividing the current sources into separate four-bit modules, commonly referred to as "quad switches", as described in U.S. Pat. No. 3,747,088, each four-bit unit requires emitter areas in the ratios of 8:4:2:1. This requires a total of 15 unit emitter areas which, in integrated circuit processing, consumes a substantial part of the total chip area.
Notwithstanding the foregoing development in the design of solid state digital-to-analog converters, there still has existed a need for converters requiring less chip area but still providing acceptable performance. One technique that has been proposed is to use current source transistors with equal emitter areas and to use a series of fixed voltage offsets between the base of the current source transistors. The fixed offsets would be chosen to approximate the base-emitter voltage difference due to the 2:1 current density ratio in successive transistors. A problem with this proposal is that the base-emitter voltage difference due to operation at different current densities is a function of absolute temperature. Accordingly, the fixed voltage offsets would provide poor temperature performance, particularly in a multiplying digital-to-analog converter where the voltage across the current source transistors may be driven to small values.